1. Field of the Invention
The present invention relates to an input buffer circuit having hysteresis characteristics.
2. Description of the Related Art
The present invention relates to an input buffer circuit having hysteresis characteristics. Generally, in order to prevent transition of an output signal due to noise characteristics of an input signal, a Schmitt trigger circuit having hysteresis characteristics is used.
The following Related Art Document, which relates to an input buffer circuit having reverse polarity hysteresis capable of obtaining a rapid response speed, has problems in that it is difficult to determine sizes of an n-type metal oxide semiconductor (NMOS) transistor and a p-type MOS (PMOS) transistor of an input terminal for determining a state of an output and it is difficult to determine a level of hysteresis.